- Apr 26, 2024
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Abel Vesa authored -
Abel Vesa authored
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Abel Vesa authored
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Abel Vesa authored
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Abel Vesa authored
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Abel Vesa authored
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Abel Vesa authored
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Abel Vesa authored
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Abel Vesa authored
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Abel Vesa authored
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Abel Vesa authored
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Abel Vesa authored
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Abel Vesa authored
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Signed-off-by:Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Signed-off-by: -
Signed-off-by: -
Starting with Qualcomm SM8350 SoC, so Low Power Audio SubSystem (LPASS) block version v9.2, the register responsible for TX SMIC MUXn muxes is different. In earlier LPASS versions this mux had bit fields for analogue (ADCn) and digital (SWR_DMICn) MICs. Choice of ADCn was selecting the analogue path in CDC_TX_TOP_CSR_SWR_DMICn_CTL register. With LPASS v9.2 and newer, the bit fields are integrated into just SWR_MICn and there is no distinction for analogue or digital MIC in the register. Fix support for LPASS v9.2+: 1. Add new set of widgets and audio routes for LPASS v9.2. 2. Do not choose analogue or digital in CDC_TX_TOP_CSR_SWR_DMICn_CTL based on value of the mux. 3. Replace all the input widgets (TX SWR_ADCn, TX SWR_DMICn) with TX SWR_INPUTn ones. The change is not backwards compatible with older DTBs and existing mixer settings, therefore it does not change handling of older platforms with working micrphones (SC8280xp) but only the ones with issues (SM8450, SM8550) which need the fix. Signed-off-by:
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Compile test was broken with Abel's "spmi: pmic-arb: Add support for multi-master". Signed-off-by: -
Signed-off-by: -
Check for SPF readiness in prm driver probe to avoid race conditions during ADSP pil loading. This patch is to avoid, sending requests to ADSP before it's PD's is up and ready. Signed-off-by:
Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Tested-by:
Ratna Deepthi Kudaravalli <rkudarav@qti.qualcomm.com> (cherry picked from commit b8d605823adfcb71fe3b3fa110dcf2fc2f53cb21) Signed-off-by:
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Signed-off-by: -
Signed-off-by:
Srinivas Kandagatla <srinivas.kandagatla@linaro.org> (cherry picked from commit 46e48e42f67ad5c375081f665ea25c868439faeb) Signed-off-by:
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DSP expects the buffers to be aligned to 64bytes, so fix the current sizes where there is a possiblity of getting an unaligned buffers. Signed-off-by:
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New versions of VA Macro has soundwire integrated, so handle the soundwire npl clock correctly in the codec driver. Signed-off-by:
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For some reason on wsa883x we see Port Collision during bank swith, adding a delay seems provide a good workaround for this. Needs more investigation. Signed-off-by:
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Registering controller even before pm runtime is enabled will result in pm runtime underflow warnings. Fix this by properly moving the runtime pm enable before registering controller. Fixes: 74e79da9 ("soundwire: qcom: add runtime pm support") Signed-off-by:
Johan Hovold <johan+linaro@kernel.org> (cherry picked from commit 7578d5a6e7e7f0e2457f330c5c10c5c0b09c900d) Signed-off-by:
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Add nodes for four WSA8845 speakers. Unlike previous boards like SM8550-QRD, this board has four speakers spread over two Soundwire buses instead of two speakers on one bus. Each pair of speakers shares the reset GPIO thus pinctrl property is only in one of them. Cc: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: -
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Signed-off-by: -
Abel Vesa authored
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Abel Vesa authored
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fixup: clk: qcom: Add Global Clock controller (GCC) driver for x1e80100 Signed-off-by:Rajendra Nayak <quic_rjendra@quicinc.com>
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fixup: clk: qcom: Add videocc driver for x1e80100 Signed-off-by: -
fixup: iris: enable building of iris video driver Signed-off-by: -
fixup: arm64: dts: qcom: x1e80100: Add venus DT node Signed-off-by: -
fixup: clk: qcom: Add videocc driver for x1e80100 Signed-off-by: -
fixup: clk: qcom: Add videocc driver for x1e80100 Signed-off-by: -
Add the venus DT node for x1e80100 Signed-off-by: -
Add the videocc driver for x1e80100 and the Device tree node for it. Signed-off-by: -
Add an entry for Iris video encoder/decoder accelerator driver. Signed-off-by:
Dikshita Agarwal <quic_dikshita@quicinc.com> Signed-off-by:
Vikash Garodia <quic_vgarodia@quicinc.com>
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