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sent/20250119-linux-next-25-01-19-x1e80100-camss-driver-8dc5e018f6e9-v1c5835a28 · ·
media: qcom: camss: Add X1 Elite support This series adds X Elite support to CAMSS. This drop includes support for 4 x CSIPHY in DPHY mode 2 phase 5 GB 4 lane 3 x CSI Decoder CSID 2 x CSID Lite 2 x Image Front End - IFE 2 x IFE Lite Dependencies: link: https://lore.kernel.org/all/20250113043133.1387162-1-quic_depengs@quicinc.com/ link: https://lore.kernel.org/all/20250119-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v4-0-c2964504131c@linaro.org To: Robert Foss <rfoss@kernel.org> To: Todor Tomov <todor.too@gmail.com> To: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: linux-media@vger.kernel.org Cc: linux-arm-msm@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Cc: Depeng Shao <quic_depengs@quicinc.com> Cc: Vikram Sharma <quic_vikramsa@quicinc.com> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> --- Bryan O'Donoghue (7): media: qcom: camss: Add an id property to struct resources media: qcom: camss: Use the CSIPHY id property to find clock names media: qcom: camss: Add CSID 680 support media: qcom: camss: Add VFE680 support media: qcom: camss: Add support for 3ph CSIPHY write settle delay media: qcom: camss: csiphy-3ph: Add 4nm CSIPHY 2ph 5Gbps DPHY v2.1.2 init sequence media: qcom: camss: Add x1e80100 specific support drivers/media/platform/qcom/camss/Makefile | 2 + drivers/media/platform/qcom/camss/camss-csid-680.c | 422 +++++++++++++++++++++ drivers/media/platform/qcom/camss/camss-csid.h | 1 + .../platform/qcom/camss/camss-csiphy-3ph-1-0.c | 136 ++++++- drivers/media/platform/qcom/camss/camss-csiphy.c | 28 +- drivers/media/platform/qcom/camss/camss-csiphy.h | 1 + drivers/media/platform/qcom/camss/camss-vfe-680.c | 243 ++++++++++++ drivers/media/platform/qcom/camss/camss-vfe.c | 2 + drivers/media/platform/qcom/camss/camss-vfe.h | 1 + drivers/media/platform/qcom/camss/camss.c | 324 +++++++++++++++- drivers/media/platform/qcom/camss/camss.h | 1 + 11 files changed, 1144 insertions(+), 17 deletions(-) --- base-commit: 0efbd85873320a5ed76c9505719a3b383c3b8815 change-id: 20250119-linux-next-25-01-19-x1e80100-camss-driver-8dc5e018f6e9 Best regards,
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sent/20241119-b4-linux-next-24-11-18-dtsi-x1e80100-camss-82a63736d072-v4637921cb · ·
Add dt-bindings and dtsi changes for CAMSS on x1e80100 silicon v4: - Applies RB from Konrad - Adds the second CCI I2C bus to CCI commit log description. I previously considered leaving out the always on pins but, decided to include them in the end and forgot to align the commit log. - Alphabetises the camcc.h included in the dtsi. - Vlad - Link to v3: https://lore.kernel.org/r/20250102-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v3-0-cb66d55d20cc@linaro.org v3: - Fixes ordering of headers in dtsi - Vlad - Changes camcc to always on - Vlad - Applies RB as indicated - Krzysztof, Konrad - Link to v2: https://lore.kernel.org/r/20241227-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v2-0-06fdd5a7d5bb@linaro.org v2: I've gone through each comment and implemented each suggestion since IMO they were all good/correct comments. Detail: - Moves x1e80100 camcc to its own yaml - Krzysztof - csid_wrapper comes first because it is the most relevant register set - configuring all CSID blocks subordinate to it - bod, Krzysztof - Fixes missing commit log - Krz - Updates to latest format established @ sc7280 - bod - Includes CSID lite which I forgot to add @ v1 - Konrad, bod - Replaces static ICC parameters with defines - Konrad - Drops newlines between x and x-name - Konrad - Drops redundant iommu extents - Konrad - Leaves CAMERA_AHB_CLK as-is - Kronrad, Dmitry Link: https://lore.kernel.org/r/3f1a960f-062e-4c29-ae7d-126192f35a8b@oss.qualcomm.com - Interrupt EDGE_RISING - Vladimir - Implements suggested regulator names pending refactor to PHY API - Vladimir - Drop slow_ahb_src clock - Vladimir Link to v1: https://lore.kernel.org/r/20241119-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v1-0-54075d75f654@linaro.org Working tree: https://git.codelinaro.org/bryan.odonoghue/kernel/-/tree/arm-laptop/wip/x1e80100-6.13-rc3 v1: This series adds dt-bindings and dtsi for CAMSS on x1e80100. The primary difference between x1e80100 and other platforms is a new VFE and CSID pair at version 680. Some minor driver churn will be required to support outside of the new VFE and CSID blocks but nothing too major. The CAMCC in this silicon requires two, not one power-domain requiring either this fix I've proposed here or something similar: https://lore.kernel.org/linux-arm-msm/bad60452-41b3-42fb-acba-5b7226226d2d@linaro.org/T/#t That doesn't gate adoption of the binding description though. A working tree in progress can be found here: https://git.codelinaro.org/bryan.odonoghue/kernel/-/tree/x1e80100-6.12-rc7+camss?ref_type=heads To: Loic Poulain <loic.poulain@linaro.org> To: Robert Foss <rfoss@kernel.org> To: Andi Shyti <andi.shyti@kernel.org> To: Rob Herring <robh@kernel.org> To: Krzysztof Kozlowski <krzk+dt@kernel.org> To: Conor Dooley <conor+dt@kernel.org> To: Todor Tomov <todor.too@gmail.com> To: Mauro Carvalho Chehab <mchehab@kernel.org> To: Bjorn Andersson <andersson@kernel.org> To: Michael Turquette <mturquette@baylibre.com> To: Stephen Boyd <sboyd@kernel.org> To: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> To: Jagadeesh Kona <quic_jkona@quicinc.com> To: Konrad Dybcio <konradybcio@kernel.org> Cc: linux-i2c@vger.kernel.org Cc: linux-arm-msm@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-media@vger.kernel.org Cc: linux-clk@vger.kernel.org Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> --- Bryan O'Donoghue (4): dt-bindings: media: Add qcom,x1e80100-camss arm64: dts: qcom: x1e80100: Add CAMCC block definition arm64: dts: qcom: x1e80100: Add CCI definitions arm64: dts: qcom: x1e80100: Add CAMSS block definition .../bindings/media/qcom,x1e80100-camss.yaml | 367 +++++++++++++++++++++ arch/arm64/boot/dts/qcom/x1e80100.dtsi | 351 ++++++++++++++++++++ 2 files changed, 718 insertions(+) --- base-commit: 0907e7fb35756464aa34c35d6abb02998418164b change-id: 20241119-b4-linux-next-24-11-18-dtsi-x1e80100-camss-82a63736d072 Best regards,
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sent/20241118-b4-linux-next-24-11-18-clock-multiple-power-domains-a5f994dc452a-v104a574fb9 · ·
clk: qcom: Add support for multiple power-domains for a clock controller. Changes in v10: - Updated the commit log of patch #1 to make the reasoning - that it makes applying the subsequent patch cleaner/nicer clear - Bjorn - Substantially rewrites final patch commit to mostly reflect Bjorn's summation of my long and rambling previous paragraphs. Being a visual person, I've included some example pseudo-code which hopefully makes the intent clearer plus some ASCII art >= Klimt. - Link to v9: https://lore.kernel.org/r/20241230-b4-linux-next-24-11-18-clock-multiple-power-domains-v9-0-f15fb405efa5@linaro.org Changes in v9: - Added patch to unwind pm subdomains in reverse order. It would also be possible to squash this patch into patch#2 but, my own preference is for more granular patches like this instead of "slipping in" functional changes in larger patches like #2. - bod - Unwinding pm subdomain on error in patch #2. To facilitate this change patch #1 was created - Vlad - Drops Bjorn's RB on patch #2. There is a small churn in this patch but enough that a reviewer might reasonably expect RB to be given again. - Amends commit log for patch #3 further. v8 added a lot to the commit log to provide further information but, it is clear from the comments I received on the commit log that the added verbiage was occlusive not elucidative. Reduce down the commit log of patch #3 - especially Q&A item #1. Sometimes less is more. - Link to v8: https://lore.kernel.org/r/20241211-b4-linux-next-24-11-18-clock-multiple-power-domains-v8-0-5d93cef910a4@linaro.org Changes in v8: - Picks up change I agreed with Vlad but failed to cherry-pick into my b4 tree - Vlad/Bod - Rewords the commit log for patch #3. As I read it I decided I might translate bits of it from thought-stream into English - Bod - Link to v7: https://lore.kernel.org/r/20241211-b4-linux-next-24-11-18-clock-multiple-power-domains-v7-0-7e302fd09488@linaro.org Changes in v7: - Expand commit log in patch #3 I've discussed with Bjorn on IRC and video what to put into the log here and captured most of what we discussed. Mostly the point here is voting for voltages in the power-domain list is up to the drivers to do with performance states/opp-tables not for the GDSC code. - Bjorn/Bryan - Link to v6: https://lore.kernel.org/r/20241129-b4-linux-next-24-11-18-clock-multiple-power-domains-v6-0-24486a608b86@linaro.org Changes in v6: - Passes NULL to second parameter of devm_pm_domain_attach_list - Vlad - Link to v5: https://lore.kernel.org/r/20241128-b4-linux-next-24-11-18-clock-multiple-power-domains-v5-0-ca2826c46814@linaro.org Changes in v5: - In-lines devm_pm_domain_attach_list() in probe() directly - Vlad - Link to v4: https://lore.kernel.org/r/20241127-b4-linux-next-24-11-18-clock-multiple-power-domains-v4-0-4348d40cb635@linaro.org v4: - Adds Bjorn's RB to first patch - Bjorn - Drops the 'd' in "and int" - Bjorn - Amends commit log of patch 3 to capture a number of open questions - Bjorn - Link to v3: https://lore.kernel.org/r/20241126-b4-linux-next-24-11-18-clock-multiple-power-domains-v3-0-836dad33521a@linaro.org v3: - Fixes commit log "per which" - Bryan - Link to v2: https://lore.kernel.org/r/20241125-b4-linux-next-24-11-18-clock-multiple-power-domains-v2-0-a5e7554d7e45@linaro.org v2: The main change in this version is Bjorn's pointing out that pm_runtime_* inside of the gdsc_enable/gdsc_disable path would be recursive and cause a lockdep splat. Dmitry alluded to this too. Bjorn pointed to stuff being done lower in the gdsc_register() routine that might be a starting point. I iterated around that idea and came up with patch #3. When a gdsc has no parent and the pd_list is non-NULL then attach that orphan GDSC to the clock controller power-domain list. Existing subdomain code in gdsc_register() will connect the parent GDSCs in the clock-controller to the clock-controller subdomain, the new code here does that same job for a list of power-domains the clock controller depends on. To Dmitry's point about MMCX and MCX dependencies for the registers inside of the clock controller, I have switched off all references in a test dtsi and confirmed that accessing the clock-controller regs themselves isn't required. On the second point I also verified my test branch with lockdep on which was a concern with the pm_domain version of this solution but I wanted to cover it anyway with the new approach for completeness sake. Here's the item-by-item list of changes: - Adds a patch to capture pm_genpd_add_subdomain() result code - Bryan - Changes changelog of second patch to remove singleton and generally to make the commit log easier to understand - Bjorn - Uses demv_pm_domain_attach_list - Vlad - Changes error check to if (ret < 0 && ret != -EEXIST) - Vlad - Retains passing &pd_data instead of NULL - because NULL doesn't do the same thing - Bryan/Vlad - Retains standalone function qcom_cc_pds_attach() because the pd_data enumeration looks neater in a standalone function - Bryan/Vlad - Drops pm_runtime in favour of gdsc_add_subdomain_list() for each power-domain in the pd_list. The pd_list will be whatever is pointed to by power-domains = <> in the dtsi - Bjorn - Link to v1: https://lore.kernel.org/r/20241118-b4-linux-next-24-11-18-clock-multiple-power-domains-v1-0-b7a2bd82ba37@linaro.org v1: On x1e80100 and it's SKUs the Camera Clock Controller - CAMCC has multiple power-domains which power it. Usually with a single power-domain the core platform code will automatically switch on the singleton power-domain for you. If you have multiple power-domains for a device, in this case the clock controller, you need to switch those power-domains on/off yourself. The clock controllers can also contain Global Distributed Switch Controllers - GDSCs which themselves can be referenced from dtsi nodes ultimately triggering a gdsc_en() in drivers/clk/qcom/gdsc.c. As an example: cci0: cci@ac4a000 { power-domains = <&camcc TITAN_TOP_GDSC>; }; This series adds the support to attach a power-domain list to the clock-controllers and the GDSCs those controllers provide so that in the case of the above example gdsc_toggle_logic() will trigger the power-domain list with pm_runtime_resume_and_get() and pm_runtime_put_sync() respectively. To: Bjorn Andersson <andersson@kernel.org> To: Michael Turquette <mturquette@baylibre.com> To: Stephen Boyd <sboyd@kernel.org> To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> To: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> To: Rajendra Nayak <quic_rjendra@quicinc.com> Cc: linux-arm-msm@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> --- Bryan O'Donoghue (4): clk: qcom: gdsc: Release pm subdomains in reverse add order clk: qcom: gdsc: Capture pm_genpd_add_subdomain result code clk: qcom: common: Add support for power-domain attachment clk: qcom: Support attaching GDSCs to multiple parents drivers/clk/qcom/common.c | 6 ++++ drivers/clk/qcom/gdsc.c | 75 +++++++++++++++++++++++++++++++++++++++-------- drivers/clk/qcom/gdsc.h | 1 + 3 files changed, 69 insertions(+), 13 deletions(-) --- base-commit: 0907e7fb35756464aa34c35d6abb02998418164b change-id: 20241118-b4-linux-next-24-11-18-clock-multiple-power-domains-a5f994dc452a Best regards,
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sent/20241119-b4-linux-next-24-11-18-dtsi-x1e80100-camss-82a63736d072-v3c45d1dff · ·
Add dt-bindings and dtsi changes for CAMSS on x1e80100 silicon v3: - Fixes ordering of headers in dtsi - Vlad - Changes camcc to always on - Vlad - Applies RB as indicated - Krzysztof, Konrad - Link to v2: https://lore.kernel.org/r/20241227-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v2-0-06fdd5a7d5bb@linaro.org v2: I've gone through each comment and implemented each suggestion since IMO they were all good/correct comments. Detail: - Moves x1e80100 camcc to its own yaml - Krzysztof - csid_wrapper comes first because it is the most relevant register set - configuring all CSID blocks subordinate to it - bod, Krzysztof - Fixes missing commit log - Krz - Updates to latest format established @ sc7280 - bod - Includes CSID lite which I forgot to add @ v1 - Konrad, bod - Replaces static ICC parameters with defines - Konrad - Drops newlines between x and x-name - Konrad - Drops redundant iommu extents - Konrad - Leaves CAMERA_AHB_CLK as-is - Kronrad, Dmitry Link: https://lore.kernel.org/r/3f1a960f-062e-4c29-ae7d-126192f35a8b@oss.qualcomm.com - Interrupt EDGE_RISING - Vladimir - Implements suggested regulator names pending refactor to PHY API - Vladimir - Drop slow_ahb_src clock - Vladimir Link to v1: https://lore.kernel.org/r/20241119-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v1-0-54075d75f654@linaro.org Working tree: https://git.codelinaro.org/bryan.odonoghue/kernel/-/tree/arm-laptop/wip/x1e80100-6.13-rc3 v1: This series adds dt-bindings and dtsi for CAMSS on x1e80100. The primary difference between x1e80100 and other platforms is a new VFE and CSID pair at version 680. Some minor driver churn will be required to support outside of the new VFE and CSID blocks but nothing too major. The CAMCC in this silicon requires two, not one power-domain requiring either this fix I've proposed here or something similar: https://lore.kernel.org/linux-arm-msm/bad60452-41b3-42fb-acba-5b7226226d2d@linaro.org/T/#t That doesn't gate adoption of the binding description though. A working tree in progress can be found here: https://git.codelinaro.org/bryan.odonoghue/kernel/-/tree/x1e80100-6.12-rc7+camss?ref_type=heads To: Loic Poulain <loic.poulain@linaro.org> To: Robert Foss <rfoss@kernel.org> To: Andi Shyti <andi.shyti@kernel.org> To: Rob Herring <robh@kernel.org> To: Krzysztof Kozlowski <krzk+dt@kernel.org> To: Conor Dooley <conor+dt@kernel.org> To: Todor Tomov <todor.too@gmail.com> To: Mauro Carvalho Chehab <mchehab@kernel.org> To: Bjorn Andersson <andersson@kernel.org> To: Michael Turquette <mturquette@baylibre.com> To: Stephen Boyd <sboyd@kernel.org> To: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> To: Jagadeesh Kona <quic_jkona@quicinc.com> To: Konrad Dybcio <konradybcio@kernel.org> Cc: linux-i2c@vger.kernel.org Cc: linux-arm-msm@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-media@vger.kernel.org Cc: linux-clk@vger.kernel.org Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> --- Bryan O'Donoghue (6): dt-bindings: i2c: qcom-cci: Document x1e80100 compatible dt-bindings: clock: move qcom,x1e80100-camcc to its own file dt-bindings: media: Add qcom,x1e80100-camss arm64: dts: qcom: x1e80100: Add CAMCC block definition arm64: dts: qcom: x1e80100: Add CCI definitions arm64: dts: qcom: x1e80100: Add CAMSS block definition .../bindings/clock/qcom,sm8450-camcc.yaml | 2 - .../bindings/clock/qcom,x1e80100-camcc.yaml | 74 +++++ .../devicetree/bindings/i2c/qcom,i2c-cci.yaml | 2 + .../bindings/media/qcom,x1e80100-camss.yaml | 367 +++++++++++++++++++++ arch/arm64/boot/dts/qcom/x1e80100.dtsi | 351 ++++++++++++++++++++ 5 files changed, 794 insertions(+), 2 deletions(-) --- base-commit: e25c8d66f6786300b680866c0e0139981273feba change-id: 20241119-b4-linux-next-24-11-18-dtsi-x1e80100-camss-82a63736d072 Best regards,
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sent/20241118-b4-linux-next-24-11-18-clock-multiple-power-domains-a5f994dc452a-v9d8f2241a · ·
clk: qcom: Add support for multiple power-domains for a clock controller. Changes in v9: - Added patch to unwind pm subdomains in reverse order. It would also be possible to squash this patch into patch#2 but, my own preference is for more granular patches like this instead of "slipping in" functional changes in larger patches like #2. - bod - Unwinding pm subdomain on error in patch #2. To facilitate this change patch #1 was created - Vlad - Drops Bjorn's RB on patch #2. There is a small churn in this patch but enough that a reviewer might reasonably expect RB to be given again. - Amends commit log for patch #3 further. v8 added a lot to the commit log to provide further information but, it is clear from the comments I received on the commit log that the added verbiage was occlusive not elucidative. Reduce down the commit log of patch #3 - especially Q&A item #1. Sometimes less is more. - Link to v8: https://lore.kernel.org/r/20241211-b4-linux-next-24-11-18-clock-multiple-power-domains-v8-0-5d93cef910a4@linaro.org Changes in v8: - Picks up change I agreed with Vlad but failed to cherry-pick into my b4 tree - Vlad/Bod - Rewords the commit log for patch #3. As I read it I decided I might translate bits of it from thought-stream into English - Bod - Link to v7: https://lore.kernel.org/r/20241211-b4-linux-next-24-11-18-clock-multiple-power-domains-v7-0-7e302fd09488@linaro.org Changes in v7: - Expand commit log in patch #3 I've discussed with Bjorn on IRC and video what to put into the log here and captured most of what we discussed. Mostly the point here is voting for voltages in the power-domain list is up to the drivers to do with performance states/opp-tables not for the GDSC code. - Bjorn/Bryan - Link to v6: https://lore.kernel.org/r/20241129-b4-linux-next-24-11-18-clock-multiple-power-domains-v6-0-24486a608b86@linaro.org Changes in v6: - Passes NULL to second parameter of devm_pm_domain_attach_list - Vlad - Link to v5: https://lore.kernel.org/r/20241128-b4-linux-next-24-11-18-clock-multiple-power-domains-v5-0-ca2826c46814@linaro.org Changes in v5: - In-lines devm_pm_domain_attach_list() in probe() directly - Vlad - Link to v4: https://lore.kernel.org/r/20241127-b4-linux-next-24-11-18-clock-multiple-power-domains-v4-0-4348d40cb635@linaro.org v4: - Adds Bjorn's RB to first patch - Bjorn - Drops the 'd' in "and int" - Bjorn - Amends commit log of patch 3 to capture a number of open questions - Bjorn - Link to v3: https://lore.kernel.org/r/20241126-b4-linux-next-24-11-18-clock-multiple-power-domains-v3-0-836dad33521a@linaro.org v3: - Fixes commit log "per which" - Bryan - Link to v2: https://lore.kernel.org/r/20241125-b4-linux-next-24-11-18-clock-multiple-power-domains-v2-0-a5e7554d7e45@linaro.org v2: The main change in this version is Bjorn's pointing out that pm_runtime_* inside of the gdsc_enable/gdsc_disable path would be recursive and cause a lockdep splat. Dmitry alluded to this too. Bjorn pointed to stuff being done lower in the gdsc_register() routine that might be a starting point. I iterated around that idea and came up with patch #3. When a gdsc has no parent and the pd_list is non-NULL then attach that orphan GDSC to the clock controller power-domain list. Existing subdomain code in gdsc_register() will connect the parent GDSCs in the clock-controller to the clock-controller subdomain, the new code here does that same job for a list of power-domains the clock controller depends on. To Dmitry's point about MMCX and MCX dependencies for the registers inside of the clock controller, I have switched off all references in a test dtsi and confirmed that accessing the clock-controller regs themselves isn't required. On the second point I also verified my test branch with lockdep on which was a concern with the pm_domain version of this solution but I wanted to cover it anyway with the new approach for completeness sake. Here's the item-by-item list of changes: - Adds a patch to capture pm_genpd_add_subdomain() result code - Bryan - Changes changelog of second patch to remove singleton and generally to make the commit log easier to understand - Bjorn - Uses demv_pm_domain_attach_list - Vlad - Changes error check to if (ret < 0 && ret != -EEXIST) - Vlad - Retains passing &pd_data instead of NULL - because NULL doesn't do the same thing - Bryan/Vlad - Retains standalone function qcom_cc_pds_attach() because the pd_data enumeration looks neater in a standalone function - Bryan/Vlad - Drops pm_runtime in favour of gdsc_add_subdomain_list() for each power-domain in the pd_list. The pd_list will be whatever is pointed to by power-domains = <> in the dtsi - Bjorn - Link to v1: https://lore.kernel.org/r/20241118-b4-linux-next-24-11-18-clock-multiple-power-domains-v1-0-b7a2bd82ba37@linaro.org v1: On x1e80100 and it's SKUs the Camera Clock Controller - CAMCC has multiple power-domains which power it. Usually with a single power-domain the core platform code will automatically switch on the singleton power-domain for you. If you have multiple power-domains for a device, in this case the clock controller, you need to switch those power-domains on/off yourself. The clock controllers can also contain Global Distributed Switch Controllers - GDSCs which themselves can be referenced from dtsi nodes ultimately triggering a gdsc_en() in drivers/clk/qcom/gdsc.c. As an example: cci0: cci@ac4a000 { power-domains = <&camcc TITAN_TOP_GDSC>; }; This series adds the support to attach a power-domain list to the clock-controllers and the GDSCs those controllers provide so that in the case of the above example gdsc_toggle_logic() will trigger the power-domain list with pm_runtime_resume_and_get() and pm_runtime_put_sync() respectively. To: Bjorn Andersson <andersson@kernel.org> To: Michael Turquette <mturquette@baylibre.com> To: Stephen Boyd <sboyd@kernel.org> To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> To: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> To: Rajendra Nayak <quic_rjendra@quicinc.com> Cc: linux-arm-msm@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> --- Bryan O'Donoghue (4): clk: qcom: gdsc: Release pm subdomains in reverse add order clk: qcom: gdsc: Capture pm_genpd_add_subdomain result code clk: qcom: common: Add support for power-domain attachment clk: qcom: Support attaching GDSCs to multiple parents drivers/clk/qcom/common.c | 6 ++++ drivers/clk/qcom/gdsc.c | 75 +++++++++++++++++++++++++++++++++++++++-------- drivers/clk/qcom/gdsc.h | 1 + 3 files changed, 69 insertions(+), 13 deletions(-) --- base-commit: 8155b4ef3466f0e289e8fcc9e6e62f3f4dceeac2 change-id: 20241118-b4-linux-next-24-11-18-clock-multiple-power-domains-a5f994dc452a Best regards,
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sent/20241227-b4-linux-next-24-12-16-titan-top-gdsc-c7fc4b38aa39-v196664a60 · ·
clk: qcom: camcc-x1e80100: Fix Titan TOP GDSC parent This is the second patch of this series: Link: https://lore.kernel.org/linux-arm-msm/e19ca61f-894e-40c8-86b9-dbd42df4aa46@linaro.org/ I've since moved the CAMCC part to a standalone patch in another series: Link: https://lore.kernel.org/linux-arm-msm/20241227-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v2-2-06fdd5a7d5bb@linaro.org Fixing the GDSC parent doesn't rely on the CAMCC yaml anyway so this one is safe/correct to apply standalone. To: Bjorn Andersson <andersson@kernel.org> To: Michael Turquette <mturquette@baylibre.com> To: Stephen Boyd <sboyd@kernel.org> To: Rajendra Nayak <quic_rjendra@quicinc.com> To: Abel Vesa <abel.vesa@linaro.org> Cc: linux-arm-msm@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> --- Bryan O'Donoghue (1): clk: qcom: camcc-x1e80100: Set titan_top_gdsc as the parent GDSC of subordinate GDSCs drivers/clk/qcom/camcc-x1e80100.c | 7 +++++++ 1 file changed, 7 insertions(+) --- base-commit: 8155b4ef3466f0e289e8fcc9e6e62f3f4dceeac2 change-id: 20241227-b4-linux-next-24-12-16-titan-top-gdsc-c7fc4b38aa39 Best regards,
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sent/20241119-b4-linux-next-24-11-18-dtsi-x1e80100-camss-82a63736d072-v2d843d5ef · ·
Add dt-bindings and dtsi changes for CAMSS on x1e80100 silicon v2: I've gone through each comment and implemented each suggestion since IMO they were all good/correct comments. Detail: - Moves x1e80100 camcc to its own yaml - Krzysztof - csid_wrapper comes first because it is the most relevant register set - configuring all CSID blocks subordinate to it - bod, Krzysztof - Fixes missing commit log - Krz - Updates to latest format established @ sc7280 - bod - Includes CSID lite which I forgot to add @ v1 - Konrad, bod - Replaces static ICC parameters with defines - Konrad - Drops newlines between x and x-name - Konrad - Drops redundant iommu extents - Konrad - Leaves CAMERA_AHB_CLK as-is - Kronrad, Dmitry Link: https://lore.kernel.org/r/3f1a960f-062e-4c29-ae7d-126192f35a8b@oss.qualcomm.com - Interrupt EDGE_RISING - Vladimir - Implements suggested regulator names pending refactor to PHY API - Vladimir - Drop slow_ahb_src clock - Vladimir Link to v1: https://lore.kernel.org/r/20241119-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v1-0-54075d75f654@linaro.org Working tree: https://git.codelinaro.org/bryan.odonoghue/kernel/-/tree/arm-laptop/wip/x1e80100-6.13-rc3 v1: This series adds dt-bindings and dtsi for CAMSS on x1e80100. The primary difference between x1e80100 and other platforms is a new VFE and CSID pair at version 680. Some minor driver churn will be required to support outside of the new VFE and CSID blocks but nothing too major. The CAMCC in this silicon requires two, not one power-domain requiring either this fix I've proposed here or something similar: https://lore.kernel.org/linux-arm-msm/bad60452-41b3-42fb-acba-5b7226226d2d@linaro.org/T/#t That doesn't gate adoption of the binding description though. A working tree in progress can be found here: https://git.codelinaro.org/bryan.odonoghue/kernel/-/tree/x1e80100-6.12-rc7+camss?ref_type=heads To: Loic Poulain <loic.poulain@linaro.org> To: Robert Foss <rfoss@kernel.org> To: Andi Shyti <andi.shyti@kernel.org> To: Rob Herring <robh@kernel.org> To: Krzysztof Kozlowski <krzk+dt@kernel.org> To: Conor Dooley <conor+dt@kernel.org> To: Todor Tomov <todor.too@gmail.com> To: Mauro Carvalho Chehab <mchehab@kernel.org> To: Bjorn Andersson <andersson@kernel.org> To: Michael Turquette <mturquette@baylibre.com> To: Stephen Boyd <sboyd@kernel.org> To: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> To: Jagadeesh Kona <quic_jkona@quicinc.com> To: Konrad Dybcio <konradybcio@kernel.org> Cc: linux-i2c@vger.kernel.org Cc: linux-arm-msm@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-media@vger.kernel.org Cc: linux-clk@vger.kernel.org Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> --- Bryan O'Donoghue (6): dt-bindings: i2c: qcom-cci: Document x1e80100 compatible dt-bindings: clock: move qcom,x1e80100-camcc to its own file dt-bindings: media: Add qcom,x1e80100-camss arm64: dts: qcom: x1e80100: Add CAMCC block definition arm64: dts: qcom: x1e80100: Add CCI definitions arm64: dts: qcom: x1e80100: Add CAMSS block definition .../bindings/clock/qcom,sm8450-camcc.yaml | 2 - .../bindings/clock/qcom,x1e80100-camcc.yaml | 74 +++++ .../devicetree/bindings/i2c/qcom,i2c-cci.yaml | 2 + .../bindings/media/qcom,x1e80100-camss.yaml | 367 +++++++++++++++++++++ arch/arm64/boot/dts/qcom/x1e80100.dtsi | 352 ++++++++++++++++++++ 5 files changed, 795 insertions(+), 2 deletions(-) --- base-commit: e25c8d66f6786300b680866c0e0139981273feba change-id: 20241119-b4-linux-next-24-11-18-dtsi-x1e80100-camss-82a63736d072 Best regards,