As some clients rely on the Bazel build, add a workflow to verify at
least one Bazel target (linux-x86). Also, perform some minor cleanup to
comments and target branches in our workflow files.

There are a few steps in our parsing logic where we skip lines that don't match the expectations of the /proc/cpuinfo node. Reduce the log level of these lines to 'debug', as these are not generally errors and are noisy on systems that have unique cpuinfo key-value pairs.

When parsing logic encounters a higher-than-expected processor number, increase the level to warning, to indicate that an error may have occurred in the parsing step.

This does not fully address #19 but resolves the underlying noise reported.

* Add .clang-format to enforce project style

The settings here match the current settings for the pytorch/pytorch
project, with the exception that 8-character-width tabs are preferred in
place of spaces.

* Mass reformat of all .c and .h files

Now that we have a clang-format file defined, clean up all usages once.

* Enable clang-format-check workflow

Enforce clang-format consistency on all new changes.

Cpuinfo was failing to build on RISC-V Linux distributions, e.g.,
Ubuntu 23.10, as it includes a header file sys/hwprobe.h that is
not yet provided by glibc (although it is provided by bionic).  We
fix the issue by only including sys/hwprobe.h when building for
Android, and invoking the hwprobe syscall directly on other
Linux distributions.  The Android specific check can be removed in
the future once sys/hwprobe.h becomes available in glibc.

This PR improves the smallfile callback error reporting, passing the
name of the inspected file in the `filename` argument instead of forcing
it to be `KERNEL_MAX_FILENAME` as before.

The original change that introduced this should have used a consistent prefix for all enum types, for consistency sake.

The initial implementation had a number of issues:
- The allocation of the CPU_SET should be checked for a NULL return.
- The CPU_*_S macros should be used when working with dynamic sets.
- The CPU_SET needs to be cleared via CPU_ZERO_S before use.
- Dynamic CPU_SETs need to be freed after use.
- The __riscv_hwprobe syscall is expecting a set *size* not a *count*.

The current logic for valid processor detection is reporting all cpus irrespective of whether they are online or not. so, it's causing thread over-subscription for the scenarios where the online cpu count < the actual cpus. This is fixed by publishing only the online cpu count as the valid processors.

On 64-bit systems, size_t will not overflow when the function to get max
processors returns UINT32_MAX. Use the appropriate uint32_t type.

* Adds header definitions for RISCV32 and RISCV64, and support in Bazel
  files for RISCV64. Adds ISA information for RISC-V and hwcap support.

* Adds support to construct the processor, core, cluster and package
  information reported by the system.

* Remaining support required for:
  - Inferring uarch of each processor (reports unknown for now).
  - Reading cache information (left empty for now).

Test: Build and ran cpu_info and isa_info on RISC-V QEMU instance and
RISC-V Android emulator. Confirmed that it properly reports the ISA
information as well as processor and cluster counts.

Tested using Intel SDE:

```
bash scripts/local-build.sh

OPTIONS=()
PLATFORMS=()

OPTIONS+=(-quark); PLATFORMS+=("Quark")
OPTIONS+=(-p4); PLATFORMS+=("Pentium4")
OPTIONS+=(-p4p); PLATFORMS+=("Pentium4 Prescott")
OPTIONS+=(-mrm); PLATFORMS+=("Merom")
OPTIONS+=(-pnr); PLATFORMS+=("Penryn")
OPTIONS+=(-nhm); PLATFORMS+=("Nehalem")
OPTIONS+=(-wsm); PLATFORMS+=("Westmere")
OPTIONS+=(-snb); PLATFORMS+=("Sandy Bridge")
OPTIONS+=(-ivb); PLATFORMS+=("Ivy Bridge")
OPTIONS+=(-hsw); PLATFORMS+=("Haswell")
OPTIONS+=(-bdw); PLATFORMS+=("Broadwell")
OPTIONS+=(-slt); PLATFORMS+=("Saltwell")
OPTIONS+=(-slm); PLATFORMS+=("Silvermont")
OPTIONS+=(-glm); PLATFORMS+=("Goldmont")
OPTIONS+=(-glp); PLATFORMS+=("Goldmont Plus")
OPTIONS+=(-tnt); PLATFORMS+=("Tremont")
OPTIONS+=(-snr); PLATFORMS+=("Snow Ridge")
OPTIONS+=(-skl); PLATFORMS+=("Skylake")
OPTIONS+=(-cnl); PLATFORMS+=("Cannon Lake")
OPTIONS+=(-icl); PLATFORMS+=("Ice Lake")
OPTIONS+=(-skx); PLATFORMS+=("Skylake server")
OPTIONS+=(-clx); PLATFORMS+=("Cascade Lake")
OPTIONS+=(-cpx); PLATFORMS+=("Cooper Lake")
OPTIONS+=(-icx); PLATFORMS+=("Ice Lake server")
OPTIONS+=(-knl); PLATFORMS+=("Knights landing")
OPTIONS+=(-knm); PLATFORMS+=("Knights mill")
OPTIONS+=(-tgl); PLATFORMS+=("Tiger Lake")
OPTIONS+=(-adl); PLATFORMS+=("Alder Lake")
OPTIONS+=(-mtl); PLATFORMS+=("Meteor Lake")
OPTIONS+=(-rpl); PLATFORMS+=("Raptor Lake")
OPTIONS+=(-spr); PLATFORMS+=("Sapphire Rapids")
OPTIONS+=(-gnr); PLATFORMS+=("Granite Rapids")
OPTIONS+=(-srf); PLATFORMS+=("Sierra Forest")
OPTIONS+=(-grr); PLATFORMS+=("Grand Ridge")
OPTIONS+=(-future); PLATFORMS+=("Future chip")

SDE_BIN="path/to/sde"

for I in "${!PLATFORMS[@]}"; do
  echo "${PLATFORMS["${I}"]}"
  "${SDE_BIN}" "${OPTIONS[$I]}" -- ./build/local/isa-info | grep "AVXVNNI"
done
```

Result:

```
Quark
        [error]
Merom
        [error]
Penryn
        [error]
Nehalem
        [error]
Westmere
        AVXVNNI: no
Sandy Bridge
        AVXVNNI: no
Ivy Bridge
        AVXVNNI: no
Haswell
        AVXVNNI: no
Broadwell
        AVXVNNI: no
Saltwell
        [error]
Silvermont
        AVXVNNI: no
Goldmont
        AVXVNNI: no
Goldmont Plus
        AVXVNNI: no
Tremont
        AVXVNNI: no
Snow Ridge
        AVXVNNI: no
Skylake
        AVXVNNI: no
Cannon Lake
        AVXVNNI: no
Ice Lake
        AVXVNNI: no
Skylake server
        AVXVNNI: no
Cascade Lake
        AVXVNNI: no
Cooper Lake
        AVXVNNI: no
Ice Lake server
        AVXVNNI: no
Knights landing
        AVXVNNI: no
Knights mill
        AVXVNNI: no
Tiger Lake
        AVXVNNI: no
Alder Lake
        AVXVNNI: yes
Meteor Lake
        AVXVNNI: yes
Raptor Lake
        AVXVNNI: yes
Sapphire Rapids
        AVXVNNI: yes
Granite Rapids
        AVXVNNI: yes
Sierra Forest
        AVXVNNI: yes
Grand Ridge
        AVXVNNI: yes
Future chip
        AVXVNNI: yes
```

Prevent detection of NEON DOT instruction set on Spreadtrum SC9863A and
Unisoc T310, where these instructions occasionally trigger SIGILL

Cortex-A65 is AArch64-only and not paired with AArch32-capable cores

The helper functions read_registry() and get_system_info_from_registry()
now return pointers to requested data on success or NULL on failure.

Note: The data size reported by the last argument of RegGetValueW()
is the number of bytes, not the number of wchar_t in the string.

Change-Id: Ib57083791b5dc7ef97baf1e1e48bd070148a2032

Fix an issue that the index of the uarchs[] array is incremented at
a wrong time which causes buffer overflow.

For example, if uarchs[] has two elements, with the first four cores
having one uarch and four cores having the other uarch, then
* without this fix, the wrong counts are
  uarchs[0].core_count == 1
  uarchs[1].core_count == 4
  uarchs[2].core_count == 3 (this overflows uarchs[])
* with this fix, the correct counts are
  uarchs[0].core_count == 4
  uarchs[1].core_count == 4

Change-Id: I9584aabf7859997f2826f8acb1b96aa3b8a5ee54

The number of elements in woa_chip_info.uarchs[] corresponds to the
maximum number of efficiency classes, rather than the number of chip
names.

Change-Id: I2166dccf085a5de52e80577617c8112cc026c961

There was a bug that get_system_info_from_registry() always returned
false regardless of what happened. To fix this, we could have returned
the success or failure of the function. However, the status can also
be inferred from whether the pointer to the chip info is NULL or not,
so we remove the redundant return type for simplicity.

Change-Id: If468000bf60f917892f776188a8fa29fcc0d4b7f

The function cpuinfo_arm_windows_init is called with
InitOnceExecuteOnce (a Windows API) which ensures the init is called
only once if it returns TRUE, even if multiple threads call it.
However, if the init returns FALSE, it will be called again from
other threads until TRUE is returned.

In our case, init should happen only once regardless of success or
failure, so cpuinfo_arm_windows_init should always return TRUE. The
actual status of initialization is indicated by setting the global
variable cpuinfo_is_initialized. This is consistent with how the x86
initialization is implemented.

Change-Id: I016a988f10e8484f81c55838b182819e6cd8c880

Change-Id: Ib6bc7dfd1b3b6282bde5798f9e225eb21ba673cc

Hard-coding special Hardware strings should be used only as a last
resort, as it bloats the library size and doesn't scale to newer
chipsets.

Close #78

Some cores don't support AArch32, but can be used in heterogeneous SoC
in combination with other cores which do support AArch32. In this case
the cores are still reported in /proc/cpuinfo, and thus should be
propertly handled to the uarch decoding code.