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  1. Mar 26, 2025
    • Neil Armstrong's avatar
      ufs: core: delegate the interrupt service routine to a threaded irq handler · 5c5da386
      Neil Armstrong authored
      
      On systems with a large number request slots and unavailable MCQ,
      the current design of the interrupt handler can delay handling of
      other subsystems interrupts causing display artifacts, GPU stalls
      or system firmware requests timeouts.
      
      Since the interrupt routine can take quite some time, it's
      preferable to move it to a threaded handler and leave the
      hard interrupt handler save the status and disable the irq
      until processing is finished in the thread.
      
      When MCQ & Interrupt Aggregation are supported, the interrupt
      are directly handled in the "hard" interrupt routine to
      keep IOPs high since queues handling is done in separate
      per-queue interrupt routines.
      
      This fixes all encountered issued when running FIO tests
      on the Qualcomm SM8650 platform.
      
      Example of errors reported on a loaded system:
       [drm:dpu_encoder_frame_done_timeout:2706] [dpu error]enc32 frame done timeout
       msm_dpu ae01000.display-controller: [drm:hangcheck_handler [msm]] *ERROR* 67.5.20.1: hangcheck detected gpu lockup rb 2!
       msm_dpu ae01000.display-controller: [drm:hangcheck_handler [msm]] *ERROR* 67.5.20.1:     completed fence: 74285
       msm_dpu ae01000.display-controller: [drm:hangcheck_handler [msm]] *ERROR* 67.5.20.1:     submitted fence: 74286
       Error sending AMC RPMH requests (-110)
      
      Reported bandwidth is not affected on various tests.
      
      Signed-off-by: Neil Armstrong's avatarNeil Armstrong <neil.armstrong@linaro.org>
    • Neil Armstrong's avatar
      ufs: core: drop last_intr_status/ts stats · 73ca33a1
      Neil Armstrong authored
      
      Drop last_intr_status & last_intr_ts drop the ufs_stats struct,
      and the associated debug code.
      
      Suggested-by: default avatarBart Van Assche <bvanassche@acm.org>
      Signed-off-by: Neil Armstrong's avatarNeil Armstrong <neil.armstrong@linaro.org>
      73ca33a1
  2. Mar 19, 2025
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