- Sep 08, 2023
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Bryan O'Donoghue authored
Signed-off-by:
Bryan O'Donoghue <bryan.odonoghue@linaro.org>
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Initialise V4L2 async notifier and parse DT for async sub-devices later, just before registering the notifier. This way the device can be made available to the V4L2 async framework from the notifier init time onwards. A subsequent patch will add struct v4l2_device as an argument to v4l2_async_nf_init(). Signed-off-by:
Sakari Ailus <sakari.ailus@linux.intel.com> Tested-by: Philipp Zabel <p.zabel@pengutronix.de> # imx6qp Tested-by: Niklas Söderlund <niklas.soderlund@ragnatech.se> # rcar + adv746x Tested-by: Aishwarya Kothari <aishwarya.kothari@toradex.com> # Apalis i.MX6Q with TC358743 Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> # Renesas RZ/G2L SMARC Signed-off-by:
Mauro Carvalho Chehab <mchehab@kernel.org>
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- Sep 05, 2023
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Adrien Thierry authored
Currently, PCS_USB registers that have their initialization data in a pcs_usb_tbl table are never initialized. Fix that. Fixes: fc646236 ("phy: qcom-qmp-combo,usb: add support for separate PCS_USB region") Signed-off-by:
Adrien Thierry <athierry@redhat.com> Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230828152353.16529-2-athierry@redhat.com
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Konrad Dybcio authored
Disappointigly, the camera activity LED is implemented in software. Hook it up as a gpio-led and (until we have camera *and* a "camera on" LED trigger) configure it as a panic indicator. Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230805-topic-x13s_cam_led-v1-1-443d752158c4@linaro.org
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Andrei Coardos authored
This function call was found to be unnecessary as there is no equivalent platform_get_drvdata() call to access the private data of the driver. Also, the private data is defined in this driver, so there is no risk of it being accessed outside of this driver file. Signed-off-by:
Andrei Coardos <aboutphysycs@gmail.com> Reviewed-by:
Bjorn Andersson <quic_bjorande@quicinc.com> Link: https://lore.kernel.org/r/20230814181823.3662-1-aboutphysycs@gmail.com
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Konrad Dybcio authored
Some TLMM pins are wakeup-capable. Describe the relationship between these two peripherals to enable this functionality. Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230811-topic-tlmm_wakeup-v1-6-5616a7da1fff@linaro.org
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Konrad Dybcio authored
Some TLMM pins are wakeup-capable. Describe the relationship between these two peripherals to enable this functionality. Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230811-topic-tlmm_wakeup-v1-5-5616a7da1fff@linaro.org
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Konrad Dybcio authored
Some TLMM pins are wakeup-capable. Describe the relationship between these two peripherals to enable this functionality. Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230811-topic-tlmm_wakeup-v1-4-5616a7da1fff@linaro.org
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Konrad Dybcio authored
Some TLMM pins are wakeup-capable. Describe the relationship between these two peripherals to enable this functionality. Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230811-topic-tlmm_wakeup-v1-3-5616a7da1fff@linaro.org
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Konrad Dybcio authored
Add support for the PDC to enable deep sleep wakeup from external sources. Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230811-topic-tlmm_wakeup-v1-2-5616a7da1fff@linaro.org
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Konrad Dybcio authored
Like all other RPMh-enabled SoCs, SDM670 includes a PDC. Document it. Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230811-topic-tlmm_wakeup-v1-1-5616a7da1fff@linaro.org
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Konrad Dybcio authored
ACV expects an enable_mask corresponding to the APPS RSC, fill it in. Fixes: f29dabda ("interconnect: qcom: Add SC8280XP interconnect provider") Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230811-topic-acv-v2-5-765ad70e539a@linaro.org
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Konrad Dybcio authored
ACV expects an enable_mask corresponding to the APPS RSC, fill it in. Fixes: 9c8c6bac ("interconnect: qcom: Add SC8180x providers") Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230811-topic-acv-v2-4-765ad70e539a@linaro.org
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Konrad Dybcio authored
ACV expects an enable_mask corresponding to the APPS RSC, fill it in. Fixes: 46bdcac5 ("interconnect: qcom: Add SC7280 interconnect provider driver") Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230811-topic-acv-v2-3-765ad70e539a@linaro.org
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Konrad Dybcio authored
ACV expects an enable_mask corresponding to the APPS RSC, fill it in. Fixes: 1f51339f ("interconnect: qcom: Add QDU1000/QRU1000 interconnect driver") Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230811-topic-acv-v2-1-765ad70e539a@linaro.org
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Konrad Dybcio authored
BCMs with an enable_mask expect to only have that specific value written to them. The current implementation only works by miracle for BCMs with enable mask == BIT(0), as the minimal vote we've been using so far just so happens to be equal to that. Use the correct value with keepalive voting. Fixes: d8630f05 ("interconnect: qcom: Add support for mask-based BCMs") Reported-by:
Bjorn Andersson <quic_bjorande@quicinc.com> Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230811-topic-icc_fix_1he-v2-2-0620af8ac133@linaro.org
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Konrad Dybcio authored
We don't need all the complex arithmetic for BCMs utilizing enable_mask, as all we need to do is to determine whether there's any user (or keepalive) asking for it to be on. Separate the logic for such BCMs for a small speed boost. Suggested-by:
Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by:
Bjorn Andersson <quic_bjorande@quicinc.com> Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230811-topic-icc_fix_1he-v2-1-0620af8ac133@linaro.org
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Steev Klimaszewski authored
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Mani Sadhasivam authored
ASPM is supported by Qcom host controllers/bridges on most of the recent platforms and so the devices tested so far. But for enabling ASPM by default (without Kconfig/cmdline/sysfs), BIOS has to enable ASPM on both host bridge and downstream devices during boot. Unfortunately, none of the BIOS available on Qcom platforms enables ASPM. Due to this, the platforms making use of Qcom SoCs draw high power during runtime. To fix this power issue, users/distros have to enable ASPM using configs such as (Kconfig/cmdline/sysfs) or the BIOS has to start enabling ASPM. The latter may happen in the future, but that won't address the issue on current platforms. Also, asking users/distros to enable a feature to get the power management right would provide an unpleasant out-of-the-box experience. So the apt solution is to enable ASPM in the controller driver itself. And this is being accomplished by calling pci_enable_link_state() in the newly introduced host_post_init() callback for all the devices connected to the bus. This function enables all supported link low power states for both host bridge and the downstream devices. Due to limited testing, ASPM is only enabled for platforms making use of ops_1_9_0 callbacks. Signed-off-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20230809081840.16034-3-manivannan.sadhasivam@linaro.org
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Mani Sadhasivam authored
This callback can be used by the platform drivers to do configuration once all the devices are scanned. Like changing LNKCTL of all downstream devices to enable ASPM etc... Signed-off-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20230809081840.16034-2-manivannan.sadhasivam@linaro.org
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Konrad Dybcio authored
Pins 83-86 and 158-160 are NC, so there's no point in keeping them reserved. Take care of that. Fixes: 32c23138 ("arm64: dts: qcom: sc8280xp: add Lenovo Thinkpad X13s devicetree") Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230803-topic-x13s_pin-v1-1-fae792274e89@linaro.org
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Krzysztof authored
Qualcomm Soundwire v2.0.0 controller comes with new interrupt bit for ignored commands. Add code to handle it in the interrupt service routine. Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230728112848.67092-2-krzysztof.kozlowski@linaro.org
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Krzysztof authored
Soundwire v2.0.0 comes with a new register LINK_STATUS for the FRAME_GEN_ENABLED field (bit indicating that an active frame is running). The old register COMP_STATUS is still there and still works, although the new one is preferred in downstream sources. Probably because it allows to choose Soundwire instance per CPU. Most of the code allowing to use new register for Soundwire v2.0.0 was already there as part of commit 312355a6 ("soundwire: qcom: add support for v2.0.0 controller"), so switch to it in swrm_wait_for_frame_gen_enabled() function. This should not have functional impact, because the old register still behaves correctly. Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230728112848.67092-1-krzysztof.kozlowski@linaro.org
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Konrad Dybcio authored
The DISP_CC GDSCs have not been instructed to use the ret registers. Fix that. Fixes: 4a66e76f ("clk: qcom: Add SC8280XP display clock controller") Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230725-topic-8280_dispcc_gdsc-v1-1-236590060531@linaro.org
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Steev Klimaszewski authored
I don't like limiting the cpu so early, so let it get a bit warmer before doing so.
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Konrad Dybcio authored
There are three categories of compatibles within the driver: 1. Ones which were introduced without a qcom,scm fallback 2. Ones which were introduced with a qcom,scm fallback 3. Ones which were defined but never used Keep 1 for backwards compatibility and axe 2 & 3. Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230623-topic-scm_cleanup-v2-3-9db8c583138d@linaro.org
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Konrad Dybcio authored
If devm_clk_get_optional throws an error, something is really wrong. It may be a probe deferral, or it may be a problem with the clock provider. Regardless of what it may be, it should definitely not be ignored. Stop doing that. Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230623-topic-scm_cleanup-v2-2-9db8c583138d@linaro.org
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Konrad Dybcio authored
The code for handling more than 1 clock is a bit messy and requires one to add new, SoC-specific compatibles if one wants to attach a clock. Switch devm_clk_get to devm_clk_get_optional to prevent throwing it from throwing errors when the clock is absent and defer checking the clock requirements to dt schema. This lets us get rid of compatibles that aren't necessary for backwards compatibility *and* will hopefully prevent the addition of meaningless new compatibles. Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230623-topic-scm_cleanup-v2-1-9db8c583138d@linaro.org
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Steev Klimaszewski authored
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Konrad Dybcio authored
Some of the values were wrong, which may have painted a wrong picture to the scheduler. Fix it. Fixes: 152d1faf ("arm64: dts: qcom: add SC8280XP platform") Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230619-topic-sc8280xp-idle-v1-3-35a8b98451d0@linaro.org
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Konrad Dybcio authored
Between WFI (C1) and rail power collapse (C4), the Cortex cores on the SC8280XP can also be shut down on their own (C3). Describe that missing idle state. Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230619-topic-sc8280xp-idle-v1-2-35a8b98451d0@linaro.org
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Konrad Dybcio authored
Apart from a total LLCC + APSS power collapse, SC8280XP can also put either the DSU rail (CPU + L3), or VDD_CX in power collapse. Add support for these lower idle states to allow more flexibility. Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230619-topic-sc8280xp-idle-v1-1-35a8b98451d0@linaro.org
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Konrad Dybcio authored
Currently we use predefined initial threshold values. This works, but does not really scale well with more and more SoCs gaining bwmon support, as the necessary kickoff values may differ between platforms due to memory type and/or controller setup. All of the data we need for that is already provided in the device tree, anyway. Change the thresholds to: * low = 0 (as we've been doing up until now) * med = high = BW_MIN Throughput going below the med threshold nudges bwmon into signaling that we should slow down (e.g. if we inherited too high bandwidth from the bootloader). Throughput going above the high threshold nudges bwmon into signaling that we should speed up so as not to choke the bus traffic due to insufficient transfer rates. F_MIN is a perfect initial value for both of these cases - if we go above it (and there's a 99.99% chance it'll happen at boot time), we should definitely make the memory go faster, whereas if we go below it, we should slow down, no matter what performance state we were at before (it's only possible for them to be >= FMIN). This only changes the values programmed at probe time, as high and med thresholds are updated at interrupt, also based on the OPP table from DT. Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by:
Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230610-topic-bwmon_opp-v2-1-0d25c1ce7dca@linaro.org
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Steev Klimaszewski authored
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Steev Klimaszewski authored
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Steev Klimaszewski authored
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Nick Depinet authored
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Ard Biesheuvel authored
Allow EFI systems to override the set of supported runtime services declared via the RT_PROP table, by checking for the existence of a 'OverrideSupported' EFI variable of the appropriate size under the RT_PROP table GUID, and if it does, combine the supported mask using logical AND. (This means the override can only remove support, not add it back). Cc: Jeffrey Hugo <jhugo@codeaurora.org>, Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Shawn Guo <shawn.guo@linaro.org> Cc: Rob Clark <robdclark@gmail.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: linux-arm-msm@vger.kernel.org Signed-off-by:
Ard Biesheuvel <ardb@kernel.org>
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Andrew Halaney authored
Fedora, the one true distro, relies on this, else NTP (chronyd) fails to work. Let us not upset the true distro. Enable it. Signed-off-by:
Andrew Halaney <ahalaney@redhat.com>
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Andrew Halaney authored
The config got dropped out when updating the defconfig in the prior commit due to it being renamed. Let's enable this again! Signed-off-by:
Andrew Halaney <ahalaney@redhat.com>
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