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  • Bryan O'Donoghue Bryan O'Donoghue bryan.odonoghue
1 author
  1. Sep 04, 2018
  3. Jul 13, 2018
  5. Jul 11, 2018
    • Gaurav Kohli's avatar
      irqchip: gic-v3: Restore enable bit of spi interrupts · c404d88e
      Gaurav Kohli authored 
      
While setting enable bit of spi interrupt, there is
chance of enabling spurious interrupt which is by default
disabled for soc. So instead of setting restore the
previous state of enable bit.

Change-Id: Ie6e363f04864fc6e36be83ebd20b19b5e6b45f54
Signed-off-by: default avatarGaurav Kohli <gkohli@codeaurora.org>
      c404d88e
    • Neeraj Upadhyay's avatar
      irqchip: gic-v3: Clear restore configuration across save/restore · ef4f766d
      Neeraj Upadhyay authored 
      
Clear all saved restore configuration, and changed spi
configuration, from prior save/restore.

Change-Id: Ic750b39d95d074d911406cf44b295c251532e40e
Signed-off-by: default avatarNeeraj Upadhyay <neeraju@codeaurora.org>
      ef4f766d
    • Mukesh Kumar Savaliya's avatar
      serial: msm_geni_serial: Fix the race between termios and ISR · ed7e0619
      Mukesh Kumar Savaliya authored 
      
This patch makes sure to process the RX EOT bit post cancel command
as part of stop rx sequencer. There could be a race between ISR and
userspace thread doing stop rx where ISR clears out the interrupts
generated as part of other operations and EOT poll may timeout.

Also there are chances that stop_rx can generate an interrupt if the
peer device sends data when client hasn't disabled the flow control.
This will trigger a call to handle_dma_rx which basically un-maps the
rx dma buffer, handles the rx data and remaps the same rx dma buffer.

As part of baud change, make sure ISR gets called exclusively against
the start_rx call. There is a slight window where dma_map of start_rx
sets the iova as DMA_ERROR_CODE for a while before actually mapping
to valid dma address and ISR uses this invalid address as part of
un-mapping the same buffer address which results into the page fault.

Change-Id: I9c69f7f9399aac060188ccee5648b8b7c46a656b
Signed-off-by: default avatarMukesh Kumar Savaliya <msavaliy@codeaurora.org>
Signed-off-by: default avatarAshok Kundurthi <askund@codeaurora.org>
      ed7e0619
    • Mukesh Kumar Savaliya's avatar
      serial: msm_geni_serial: Remove manual flow control and set as RFR OPEN · a18613fb
      Mukesh Kumar Savaliya authored 
      
This patch removes the manual flow control and instead gives the RFR
control to the HW depending on the FIFO level. In case of Manual flow
control FW introduced a race and caused RFR to remain High at RX shutdown
which blocked peer device from sending any data.

The latest FW along with this patch makes sure RFR gets configured as an
RFR OPEN post RX cancel and removes the need to have any manual flow. Also
wait for the RX EOT bit post cancel command as per the suggested sequence.

Also Log the GENI FW version for primary and secondary sequencer.

Change-Id: Ifc06a3f1c971eb7490ff8e678779e7163008f999
Signed-off-by: default avatarMukesh Kumar Savaliya <msavaliy@codeaurora.org>
Signed-off-by: default avatarAshok Kundurthi <askund@codeaurora.org>
      a18613fb
  7. Jun 28, 2018
  9. Jun 27, 2018
  11. Jun 12, 2018