remove interrupt signal mask before waiting, and
Wake up all threads waiting in app_block_wq.

Bug: 129524800
Change-Id: I0b441c2fd8a4f829c356492a8facd56f92c97884
Signed-off-by: Zhen Kong <zkong@codeaurora.org>

Kernel threads are not freezable by default, change to use
wait_event_interruptible to prevent a frozen qseecom thread
being blocked until another frozen thread is thawed.

Bug: 129524800
Change-Id: I09d374c763a316201e790d9003b0b9785debd44a
Signed-off-by: Zhen Kong <zkong@codeaurora.org>

Double check if app entry still exists before deleting it from
app list when unloading app.

Bug: 129524800
Change-Id: I61c70fe9d3d323696f9f1bbc1257ae768c5f991b
Signed-off-by: Zhen Kong <zkong@codeaurora.org>

remove get/put_online_cpus call since it could cause
deadlock in cpu hotplug path. This might cause race
but should be rare and we should be able to correct
that with the next dump.

=======================================================
    Task name: Binder:897_2 pid: 3255 cpu: 0 start: 0xffffffd39e2f5700
    state: 0x2 exit_state: 0x0 stack base: 0xffffff80241f0000 Prio: 116
    Stack:
    [<ffffff9048f3163c>] __switch_to.cfi+0x138
    [<ffffff904a947808>] __schedule+0xb7c
    [<ffffff904a94dbdc>] rwsem_down_read_failed.cfi+0x270
    [<ffffff904900a0a4>] __percpu_down_read.cfi+0x164
    [<ffffff90491bc4e8>] record_stat+0x6c0
    [<ffffff90491bbdfc>] mm_event_end.cfi+0x14c
    [<ffffff904916c280>] try_to_free_pages.cfi+0xaf4
    [<ffffff904914a598>] __alloc_pages_nodemask.cfi+0x9c8
    [<ffffff9049aa6350>] zcomp_cpu_up_prepare.cfi+0x88
    [<ffffff9048f66da8>] cpuhp_invoke_callback+0x378
    [<ffffff9048f664e0>] _cpu_up+0x1bc
    [<ffffff9048f6aadc>] enable_nonboot_cpus.cfi+0x208
    [<ffffff90490135f4>] suspend_devices_and_enter.cfi+0xc20
    [<ffffff9049012844>] pm_suspend.cfi+0xb30
    [<ffffff9049010568>] state_store.cfi+0x94
    [<ffffff904a9339dc>] kobj_attr_store.cfi+0x34
    [<ffffff90492ed9ec>] sysfs_kf_write.cfi+0x64
    [<ffffff90492eb51c>] kernfs_fop_write.cfi+0x1a4
    [<ffffff90491fbf34>] __vfs_write.cfi+0x50
    [<ffffff90491fbd58>] vfs_write.cfi+0xcc
    [<ffffff90491fefd4>] SyS_write.cfi+0xa4
    [<ffffff9048e84080>] el0_svc_naked+0x34

Test: manual suspend/resume test
Bug: 132011965
Change-Id: I112ca0d25e825bb4e0e8979d9b4f1d8e6090147f
Signed-off-by: Martin Liu <liumartin@google.com>
(cherry picked from commit 5f419093)

Bug: 131793307
Bug: 131384998

Use kernel cmdline for modem bootmode instread of cdt node

Change-Id: I691f98453d5e691e5d89e97e7fd3fc2ac3d31667
Signed-off-by: SalmaxChang <salmaxchang@google.com>

If client enables HW AUTOCTS mode then set UPSTAT_AUTOCTS,otherwise
serial core disables TX fully at the framework layer and
no communication happens.

Bug: 130995337

Change-Id: Ied2bec705991aad16638f767c09f33ae4dbfafdf
Signed-off-by: Akash Asthana <akashast@codeaurora.org>
Signed-off-by: Roopesh Nataraja <roopeshr@codeaurora.org>

Bug: 128936886
Test: Encrypt and decrypt ramoops successfully
Change-Id: I88f1763a531381b3af3c06e7ddfddc46eae653e9
Signed-off-by: Chungjui Fan <chungjuifan@google.com>
(cherry picked from commit a10b4750e7c83e19fb08154720763f4a1075f842)

ION_HEAP_POOL is a portion of ION_HEAP. For total
ION memory counting, use ION_HEAP is sufficient.

Bug: 116825053
Test: boot
Change-Id: I601cca418dbba735521b737475ec65f592cbd8ce
Signed-off-by: Martin Liu <liumartin@google.com>
(cherry picked from commit d6b3e239)

wakeup_reason driver probe happens after first interrupts calls into
the code using the wakelock, since the lock is a static variable use
the initializer.

Bug: 131421371
Change-Id: I41c5c6acb52ed813615c4e35c336341771266e3d
Signed-off-by: Thierry Strudel <tstrudel@google.com>

Bug: 123635022
Change-Id: I07a2df2a337292d90505a39f6cdf2ab26279b3aa
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>

This reverts commit abd189e9.

Reason for revert: remove debug log

Bug: 130881333
Bug: 131267865
Test: boot
Change-Id: Id72981efcb6cb93e8526eec3caea57bf1abb8eb9
Signed-off-by: Howard Yen <howardyen@google.com>

The memory leak occurs when kmalloc() for info->table fails, info is freed
but info->cpu_addr allocation is left.
Fixes: eeeb9407 ("ion: add snapshot of ion support for MSM")

Bug: 130817249
Test: builds and boots
Change-Id: I7faf5be5129a46b2f874f4e3803470e5f5130a21
Reported-by: Mikael Magnusson <Mikael.Magnusson@sony.com>
Suggested-by: Mikael Magnusson <Mikael.Magnusson@sony.com>
Signed-off-by: Suren Baghdasaryan <surenb@google.com>

JUN 2019.5

Bug: 129970703
Change-Id: I42ab441a06c29125d59d14dc1ddb4867355be05c
Signed-off-by: Max Shi <meixuanshi@google.com>

This reverts commit 9bc69310.

Bug: 119288681
Bug: 130710004
Bug: 130273426
Change-Id: I79df56b022aba50e91e1d9cbaf491a99db159e91
Signed-off-by: Eva Huang <evahuang@google.com>

It will cause large size increment in kernel image and cause oversize.

Bug: 119288681
Bug: 130710004
Bug: 130273426
Change-Id: I8013fe29d26e667add1109717339c6d5b75cc99e
Signed-off-by: Eva Huang <evahuang@google.com>

It is unnecessary to update disabled thermal zones post suspend and
sometimes leads error/warning in bad behaved thermal drivers.

Bug: 129435616
Change-Id: If5d3bfe84879779ec1ee024c0cf388ea3b4be2ea
Signed-off-by: Wei Wang <wvw@google.com>

Changed sysfs implementation to pass CFI failure.
The all sysfs entries are placed in a single directory
named 'impaired'. The names of sysfs entries have also been
cleaned up to have 'read_' or 'write_' as a prefix.
Followings are the final sysfs entries:

/sys/devices/platform/soc/1d84000.ufshc/impaired/
  enabled
  read_delay_percent
  read_delay_us
  read_max_delay_error_us
  read_max_delay_us
  read_max_delayed_us
  read_model
  read_skip_delay_cnt
  read_total_cnt
  read_total_delay_error_us
  read_total_delayed_us
  read_total_original_us
  write_delay_percent
  write_delay_us
  write_max_delay_error_us
  write_max_delay_us
  write_max_delayed_us
  write_model
  write_skip_delay_cnt
  write_total_cnt
  write_total_delay_error_us
  write_total_delayed_us
  write_total_original_us

Bug: 130549301
Change-Id: I14cedbb2fa184c0772d3f0687d3d8ac8fcfbddf0
Signed-off-by: Hyojun Kim <hyojun@google.com>

This reverts commit e48c4d87.

Reason for revert: NIAP kernel prebuilts are ready. So the change is no longer needed in this branch.

Change-Id: Iecc34f3c3f01c138a1c7d04b402c54231f35a89b
Signed-off-by: Sunil Ravi <sunilravi@google.com>

Bug: 118765019
Bug: 127357453
Change-Id: I8e62b44b5d6e52249042ece3914baf9d59855c79
Signed-off-by: Anthony Loeppert <anthony.loeppert@intel.com>

Bug: 111652429
Bug: 118765019
Change-Id: I813d6d7d526167b7a5c803dad02052e0ad1eb33b
Signed-off-by: Anthony Loeppert <anthony.loeppert@intel.com>

Updating timing for FSP1 as informed by recent simulations
by memory ip provider.

PHY_CLK_WR_BYPASS_SLAVE_DELAY to 0x510 for all slices
PHY 01/129/257/385 touched.

PHY_RDDQS_DQ_BYPASS_SLAVE_DELAY to 0x80 for all slices
PHY 14/142/270/398 touched

PHY_RDDQS_LATENCY_ADJUST to 0x0 for all slices
PHY 83/211/339/467 touched

Bug: 111652429
Bug: 118765019
Change-Id: I884f49d146caf4160c2e083b614c0af8bccccf3c
Signed-off-by: Anthony Loeppert <anthony.loeppert@intel.com>
Signed-off-by: tsrytkon <teemu.s.rytkonen@intel.com>

mnh-drr.c
* Minimize ddr auto low power mode reg accesses.
* On enable_lp method move the possible EXIT_EN change prior to ENTRY_EN.

Bug: 111652429
Bug: 118765019
Change-Id: Ice15c0deeb58b685ebb7ae003b189777d75b5f72
Signed-off-by: Anthony Loeppert <anthony.loeppert@intel.com>

* Added SW assisted PI training workaround to
avoid runt pulses during initialization.

Bug: 111652429
Bug: 118765019
Change-Id: I6bb4868dfb5daef438c1aa55068cb5543f308c11
Signed-off-by: Anthony Loeppert <anthony.loeppert@intel.com>

mnh-clk.c
* Replace unreliable hardware assisted ddr freq switch
with a software controlled routine.
* Use DDR_CTL.133.CURRENT_REG_COPY to get
current as frequency index as the SCU's view
is not authoritative when using software switching.

mnh-ddr.[ch]
* Created function mnh_ddr_clear_lpc_status
as a convenience to clearing switch bits.
* Created function mnh_ddr_print_phy_status
to look for known good signatures and error
otherwise.
* Added mrw_fsps data structure which are frequency
specific mode register values that need to be written
during mnh_ddr_sw_switch.
* Created function mnh_ddr_sw_switch
Implements memory ip runt pulse avoidance scheme
during frequency switch.

Bug: 111652429
Bug: 118765019
Change-Id: I3cb8beb0634600f616b18bcdc7cdedbe9727c15c
Signed-off-by: Anthony Loeppert <anthony.loeppert@intel.com>
Signed-off-by: Cheng Gu <gucheng@google.com>

* Created function mnh_ddr_pi_int_status_bit
to read PI int status bits.
* Add precautionary check of PI status being done
during initialization.
* Created function mnh_ddr_write_clk_from_fsp
instead of longer macro for WRITE_CLK_FROM_FSP.
Added precaution of freezing PLL during writes.
* Override power-on defaults of clock div fields to avoid
known issue (already corrected in FSP settings in regconfig)
to avoid div by 1.
* DDR interrupt status spans two registers.
Modified mnh_ddr_clr_int_status to change order of
clearing lower bits first it as sometimes immediately reading it
after still has bit 35 set which is the logical OR of all
bits in the status.
* Removed orphan / unused function mnh_ddr_disable_odt
* Added iso_n gpio reference to ddr driver internal state.
* Modified register pull/backup during suspend
and register restoration during resume to reflect that
boot (FSP0) is not included in the PHYs internal
copies thus FSP1 corresponds to PHY freq. index 0.
* Removed debug reads of mode register 4
* Move resume register overrides to mnh_ddr_po_init
after init done is received.
* Remove suspend_fsp from mnh_ddr_internal_state and
macros to read and write it.
* only switch freq. on suspend if needed.
* added misc. timing instrumentation

Bug: 111652429
Bug: 118765019
Change-Id: Id8aa5120ca022b499188e24f8b0abd16a392aacc
Signed-off-by: Anthony Loeppert <anthony.loeppert@intel.com>
Signed-off-by: Cheng Gu <gucheng@google.com>

CTL 69/70/71/72 correct TXSR_F0-3

CTL 114/116
Controller changes for setting threshold above PHY_LP_WAKEUP for F0 and
    F1 to 0x9
    0x00070903 /* ctl 114 */ LPI_SRPD_DEEP_MCCLK_GATE_WAKEUP_F0
    0x02000709 /* ctl 116 */, LPI_SRPD_DEEP_MCCLK_GATE_WAKEUP_F1

    LPI_SRPD_DEEP_MCCLK_GATE_WAKEUP_F2 and
    LPI_SRPD_DEEP_MCCLK_GATE_WAKEUP_F3 remains same as 7. Since the
    threshold for PHY_LP_WAKEUP is now 8, F2 and F3 will not go to deep
    sleep but F0 and F1 will go to deep sleep power down mode.
    More PHY changes lower @ PHY 1053/1054/1058

CTL 164 MNH_DDR_CTL_OUTf(164, MR13_DATA_0, 0xD0) moved into regconfig

CTL 169 FSP_OP_CURRENT
    Memory Controller and DRAM are not in sync with respect to the
    Frequency Set Operating Point post PHY Independent (PI) Training
    of FSPs during cold boot.

PI 117
    if PI_CALVL_EN_F1 is clear, then CALVL will not happen for FSP2

PHY 1053/1054/1058
    Changed registers in the PHY
    1058 PHY_LP_WAKEUP threshold set to 0x8
    The PHY 1053 and 1054 is the boot PLL settings,
    PHY_LP4_BOOT_PLL_CTRL_CA, PHY_LP4_BOOT_PLL_CTRL,
    PHY_LP4_BOOT_TOP_PLL_CTRL

PHY 1082 - periodic pad calibration

Bug: 111652429
Bug: 118765019
Change-Id: Ic83c5ed1ca608e2c5da513e5f2ec4038b45a072a
Signed-off-by: Anthony Loeppert <anthony.loeppert@intel.com>

This reverts commit b14b9859.

Re-submit in order to line up with vendor release in preparation to
apply further bug fixes.

The previous revert was due to observed FSP1 issue in b/109634286,
but since FSP1 is no longer POR, the main focus is to improve FSP2
stability, and FSP1 is of less concern.

Bug: 111652429
Bug: 118765019
Change-Id: If339b7b27fb7f8579f74383ee5436894b477af88
Signed-off-by: Cheng Gu <gucheng@google.com>

This patch removes struct device * from some function signatures.
This alignes with vendor code base and is meant to simply cherry-picking
functional fixes.

Affected functions:
mnh_ddr_int_status()
mnh_ddr_clr_int_status()
mnh_ddr_clr_int_status_bit()
mnh_ddr_disable_lp()
mnh_ddr_send_lp_cmd()

Bug: 111703181
Change-Id: I62a2d2d9ff1991fe98c929e283598d6325bedad4
Signed-off-by: Cheng Gu <gucheng@google.com>

This isn't expected to fail (DDR init), but catch any errors
and don't proceed.

Adds mnh_ddr_sanity_check() in ddr_po_init and ddr_resume.

Bug: 111703181
Change-Id: I3c7e374c6b90c9937c513320ce320339e320c46b
Tracked-On: https://jira01.devtools.intel.com/browse/MH2-682


Signed-off-by: Anthony Loeppert <anthony.loeppert@intel.com>
Signed-off-by: Cheng Gu <gucheng@google.com>

In previous code review, we fixed a memory leak and changed ownership
of mnh-ddr driver.

This caused out of sync with vendor code base, and we now have some
big changes in the ddr driver.

For the ease of porting changes and correctness, revert the data
structure change.

The memory leak fix does not get reverted here.

This partially reverts commit eacc41fc.

Bug: 111703181
Change-Id: If8a9728a68cef49b7deb670015fafdc7c2e169eb
Signed-off-by: Cheng Gu <gucheng@google.com>

Adds MNH CPU related definitions to allow register access.

Bug: 118765019
Change-Id: Ibcdf7485a81d3520461fb920442052c889a0e97a
Signed-off-by: Cheng Gu <gucheng@google.com>

Add cpu_cg sysfs for halting MNH CPU.

Bug: 110053899
Change-Id: I16cba1ba487628a40749a603d4ee986d28def3a1
Signed-off-by: Cheng Gu <gucheng@google.com>

This patch also prints BOOT_STAT on boot/resume failure, in addition
to BOOT_TRACE.  This helps collect data for stability issues.

BOOT_STAT shows boot sequence in lower level firmware.
BOOT_TRACE shows boot sequence in Easel kernel.

Bug: 111652429
Bug: 118765019
Change-Id: I4d96b82e7ca9db1fb23560e97415e3ff064d03b9
Signed-off-by: Cheng Gu <gucheng@google.com>

On an emergency shutdown event, link may be in a bad state and may
cause kernel BUG on our platform:
  Unhandled fault: synchronous external abort

In such case, update PCIe link status before disabling PCIe irq,
in order to avoid any read/write to PCIe configuration registers.

In the normal case, the original sequence is not affected.

Bug: 76434914
Change-Id: I0ef078c747660cbb31e57142cac12bfb6a2b3162
Signed-off-by: Cheng Gu <gucheng@google.com>

There would be no soc mitigation for a few minutes due to booting sequence
issue when soc is less than or equal to 10. Add notification to bcl driver
once maxfg init_work is done.

// Before
[    0.769687] bcl_peripheral:bcl_evaluate_soc test: battery_percentage = 100
[  193.033827] bcl_peripheral:bcl_evaluate_soc test: battery_percentage = 9
[  193.034239] thermal_sys: thermal_cdev_update test: thermal-cpufreq-4 = 18

// After
[    0.772569] bcl_peripheral:bcl_evaluate_soc test: battery_percentage = 100
[    2.538930] bcl_peripheral:bcl_evaluate_soc test: battery_percentage = 10
[    2.539657] thermal_sys: thermal_cdev_update test: thermal-cpufreq-4 = 18

Bug: 125245731
Test: bcl read correct soc earlier in local test
Change-Id: I45eff19491c335f637f56051a47cb99e1f919ee4
Signed-off-by:  <mandyshen@google.com>

This reverts commit 9cdebb9d.

Reason for revert: June MPR security changes are in. Got approval to check-in this NIAP changes.

Change-Id: I9e04aa0bbfb10a78b8f02748687d253977188df7
Signed-off-by: Sunil Ravi <sunilravi@google.com>

JUN 2019.4

Bug: 129970703
Change-Id: I512ace87d1606b7a359fecec096aae62a73dc533
Signed-off-by: Max Shi <meixuanshi@google.com>
Signed-off-by: Harrison Lingren <hlingren@google.com>

JUN 2019.3

Bug: 129970703
Change-Id: I0c68f2221151caf26dda1c58cce01ddf910eca20
Signed-off-by: Max Shi <meixuanshi@google.com>

JUN 2019.2

Bug: 129970703
Change-Id: Ic0d101dcf1585ab35b4845b228dd8a12a56b2410
Signed-off-by: Max Shi <meixuanshi@google.com>

JUN 2019.1

Bug: 129970703
Change-Id: I5cbc191fa65521a0dc372e020bc8f823484e0352
Signed-off-by: Max Shi <meixuanshi@google.com>